Funded Projects

Welcome to the SLS’ funded projects webpage

This page sums up all the projects funded by different French/European institutions or industries (Catrene/Medea, European FP, French ANR, STMicroelectronics, …) in which the SLS group is involved.


This project “COMCAS” aims at breakthrough low-power design solutions for (data) communication-centric heterogeneous multi core architectures targeting 45nm and 32nm CMOS technologies. These architectures will be exploited in a number of future applications e.g. the next generation of programmable multi-processor mobile phones and mobile digital entertainment devices.


There is no processing power ceiling for the demand of low consumption, low cost, dense DSP for future embedded audio, video, human-centric applications. Nanoscale systems on chip will integrate billion-gate designs. The challenge is to find a scalable HW/SW design style for future CMOS technologies. The main problem is wiring, which threats Moore’s law. Future computing architectures for Embedded DSP and Control are strategic and deserve adequate research efforts. Tiled architectures suggest a possible HW path: “small” processing tiles connected by “short wires”.


The iGLANCE project aims at making interactive free viewpoint selection possible in 3D TV broadcasted media. This means that the viewer can select and interactively change the viewpoint of a stereoscopic streamed video. The interactivity is enabled by broadcasting a number of video streams from several viewpoints, consisting of a traditional 2D video and additionally depth information for each frame. Any desired view location in-between is generated by free viewpoint interpolation, using the depth information. The interpolated images are then displayed on a stereoscopic screen, giving a 3D impression to the audience.


EURETILE investigates and implements brain-inspired foundational innovations to the system architecture of massively parallel tiled computer architectures and the corresponding programming paradigm. The execution target is a many-tile HW platform, equipped with a many-tile simulator.


OpenTLM is devoted to open tools for the virtual prototyping of systems-on-a-chip based on Transaction-Level-Modeling (TLM).


SoCLib is an open platform for virtual prototyping of multi-processors system on chip (MP-SoC). The core of the platform is a library of SystemC simulation models for virtual components (IP cores), with a guaranteed path to silicon. The project is funded by the french ‘Agence Nationale pour la Recherche’.


SoftSoC aims at solving the main SoC productivity bottleneck by providing Hardware Dependant Software (HDS) solutions to enable SoC designers to aggregate multiple HW IP with their associated HDS into efficient design.